Design and analysis of reconfigurable sram based fpga architectures
Loading...
Date
item.page.authors
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
The recent developments in wireless communication, Very Large Scale
newlineIntegration (VLSI), and embedded system design require a reconfigurable Field
newlineProgrammable Gate Array (FPGA) memory system. The reconfigurable FPGA
newlinememory system should have the following capabilities such as improved
newlinestability, less area, hardware threat free, high speed and energy efficient. FPGA
newlineis the most recently used platform for real time applications such as security,
newlinenetworking, digital cameras, cell phones, synthesizers, game consoles, aerospace,
newlinedefence, medical electronics, ASIC prototyping, automotive, consumer
newlineelectronics, distributed monetary systems, high performance computing, industrial,
newlinemedical, scientific instruments, security systems and multimedia processing.
newlineIn order to improve the stability of reconfigurable systems, it is decided to
newlineimplement a stability enhancing Static Random Access Memory (Static
newlineRAM or SRAM) cell in FPGA memory systems. SRAM is a type of RAM that
newlineuses latching circuitry (flip-flop) to store each bit. The term static differentiates
newlineSRAM from dynamic RAM (DRAM), in which DRAM must be
newlineperiodically refreshed. SRAM is faster and more expensive than DRAM; it is
newlinetypically used for CPU cache while DRAM is used for the main memory of a
newlinecomputer. Though it can be characterized as volatile memory, SRAM
newlineexhibits data remanence. SRAM offers a simple data access model and does not
newlinerequire a refresher circuit. SRAM is classified as Non-volatile SRAM and
newlinePseudo SRAM. By transistor type it is divided into (i) Bipolar junction
newlinetransistor (used in TTL and ECL) It can provide very fast operation but with
newlinehigh power consumption. (ii) MOSFET (used in CMOS) - It is of low power
newlineconsuming and very common today. Based on flip-flop type, it is divided into
newline(i) Binary SRAM and (ii) Ternary SRAM.
newline