Design and Analysis of a Novel Hybrid 8 × 8 Bit Multiply and Accumulate MAC Architecture Using Clock Gating Scheme for Pipelined Processing

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dc.contributor.guideDr Cherry Bhargava and Dr Shruti Jain (Co Supervisor)
dc.coverage.spatial
dc.creator.researcherRajkumar Sarma
dc.date.accessioned2020-12-09T03:54:00Z
dc.date.available2020-12-09T03:54:00Z
dc.date.awarded
dc.date.completed2020
dc.date.registered2014
dc.description.abstractnewline
dc.description.note
dc.format.accompanyingmaterialDVD
dc.format.dimensions
dc.format.extent
dc.identifier.urihttp://hdl.handle.net/10603/308516
dc.languageEnglish
dc.publisher.institutionFaculty of Technology and Sciences
dc.publisher.placePhagwara
dc.publisher.universityLovely Professional University
dc.relation
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.titleDesign and Analysis of a Novel Hybrid 8 × 8 Bit Multiply and Accumulate MAC Architecture Using Clock Gating Scheme for Pipelined Processing
dc.title.alternative
dc.type.degreePh.D.

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