Performance Enhancement of Next Generation Wireless Networks Using Deep Learning

Abstract

Next-generation wireless communication, including the fifth generation (5G) and beyond, newlinehas triggered the demand for network intelligence to support very high data rates newlineand extremely low latency with diverse quality-of-service (QoS) requirements. Subsequently, newline5G wireless operators face the challenge of network complexity, diversification newlineof services, and personalized user experience. Modulation identification, signal decoding, newlinemultiple antennas with beamforming, and resource provisioning are the main newlinechallenges in next-generation wireless networks to provide the best performance while newlinesupporting guaranteed QoS. In recent years, machine learning (ML)-based approaches newlinehave emerged over traditional complex algorithms to support these challenges optimally. newlineDeep learning (DL)-based systems may do increasingly complex tasks for which no newlinetractable mathematical models are available. By learning from the data, these systems newlinemight be trained to accept the undesired impacts of real-world hardware and channels newlinerather than attempting to eliminate them. This thesis studies the impact of DL algorithms newlineand unlocks DL s full potential to improve next-generation wireless communication newlinenetwork performance. newlineThe first work of this thesis uses the DL algorithm to recognize the modulation at the newlinereceiver side, as selecting the appropriate modulation scheme is essential for successful newlinecommunication. It proposed a quantized convolutional layer-based network (QMCNet) newlinefor automatic modulation recognition. The proposed QMCNet architecture uses six newlineone-dimensional (1D) convolution (conv1D) layers with smaller kernel sizes and fewer newlineoutput channels to the convolutional neural network (CNN) layers. This compressed newlinearchitecture makes QMCNet less complex with a low memory footprint while providing newlinecomparable accuracy to the VGG10 network. The work was further improved by newlineproposing a residual unit-based network (RUNet) suitable for hardware implementation newlinein FPGA. The accuracy of the proposed RUNet is 94.46% while reducing the complexity newlineby 99.