Investigations on performance analysis of test power reduction and test data compression techniques for digital integrated circuits

Thumbnail Image

Files

01_title page.pdf (24.87 KB)
 02_certificate.pdf (628.22 KB)
 03_abstract.pdf (164.5 KB)
 04_acknowledgement.pdf (9.9 KB)
 05_table of content.pdf (340.63 KB)

Date

item.page.authors

Journal Title

Journal ISSN

Volume Title

Publisher

Abstract

Abstract available

Description

Keywords

Citation

URI

http://hdl.handle.net/10603/232765

Collections

Faculty of Information and Communication Engineering

item.page.endorsement

item.page.review

item.page.supplemented

item.page.referenced