Implementation of neuromorphic computing framework using tunneling based devices

dc.contributor.guideSaurabh, Sneh
dc.coverage.spatial
dc.creator.researcherGupta, Abhinav
dc.date.accessioned2024-05-14T09:33:14Z
dc.date.available2024-05-14T09:33:14Z
dc.date.awarded2024
dc.date.completed2024
dc.date.registered
dc.description.abstractIn recent years, Machine Learning (ML) and Artificial Intelligence (AI) have become one of the hot topics for research and have found their use in various applications across different sectors like healthcare, automotive, marketing, finance, agriculture, Natural Language Processing (NLP), etc. However, training the current state-of-the-art AI-based algorithms are highly energy intensive. For instance, an energy of 932 MWh is required to train OpenAI s GPT-3 NLP model. The large power consumption stems from training these algorithms on conventional computing systems based on the von-Neumann architecture. In the von-Neumann architecture, memory and computation are decoupled from one another, making it energy intensive. The human brain, comprising about 1011 neurons and 1015 synapses, operates at a power budget of just 20W. Taking inspiration from the highly dense and energy-efficient architecture of the biological brain, Spiking Neural Networks (SNN) aim to model the behavior of the biological neural network in an energy- efficient manner. The neurons in an SNN communicate via discrete action potentials or spikes, which are sparse in time. In this work, an energy-efficient SNN is proposed, which can be trained on-chip in an unsupervised manner using Spike Timing Dependent Plasticity (STDP). Firstly, to implement an energy-efficient SNN, a Leaky Integrate and Fire (LIF) neuron has been proposed. The proposed neuron, comprising a Ge- based PD-SOI MOSFET, can directly receive the incoming voltage spikes and avoid energy dissipation in generating a summed potential. The smaller bandgap with dominant direct tunneling of Ge allows the device to operate at a lower voltage level. The energy consumption per spike of the proposed neuron is 0.07fJ, which is lower than LIF neuron implementations (experimental or simulated) reported in the literature. A Ferromagnetic Domain Wall (FM-DW) based device has been employed to function as a synapse. It comprises a Magnetic Tunnel Junction (MTJ) with a Heavy Metal (HM) underlayer.
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensions30 cm.
dc.format.extent207 p.
dc.identifier.urihttp://hdl.handle.net/10603/564290
dc.languageEnglish
dc.publisher.institutionElectronics and Communication Engineering
dc.publisher.placeDelhi
dc.publisher.universityIndraprastha Institute of Information Technology, Delhi (IIIT-Delhi)
dc.relation
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.titleImplementation of neuromorphic computing framework using tunneling based devices
dc.title.alternative
dc.type.degreePh.D.

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