Energy efficient load aware Dynamic Memory Management for System on Chip

dc.contributor.guideNARMADHA R
dc.coverage.spatial
dc.creator.researcherSUNDARI K S
dc.date.accessioned2024-10-10T12:40:35Z
dc.date.available2024-10-10T12:40:35Z
dc.date.awarded2024
dc.date.completed2023
dc.date.registered2019
dc.description.abstractThe increasing the escalating complexity and growing demand for downsizing in System-on-Chip (SoC) design underscore the significance of efficient memory management techniques. To address increasing computational demands and energy constraints in contemporary computing, this research introduces two pioneering algorithms: Energy-Efficient Load-Aware Memory Management (ELMM) and Shared Distributed Memory (SDM). These algorithms are specifically tailored to optimize dynamic memory management in System-on-Chip (SoC) architectures. newlineThe proposed ELMM technique minimizes additional storage requirements after mapping using a Task Monitoring Algorithm, thereby reducing energy consumption. The ELMM system for SoCs utilizes Field-Programmable Gate Arrays (FPGAs) to offload computational load from the main CPU core. A novel Memory Mapping Algorithm is developed to optimize data placement on the reconfigurable fabric, benefiting both software and hardware components. newlineThe integration of FPGAs into SoC platforms has revolutionized design possibilities by enabling efficient computational load distribution. However, effective memory management is critical to ensuring optimal performance and minimizing power consumption. To address this, the proposed ELMM system leverages load-aware techniques to intelligently allocate and manage memory resources. The system dynamically maps data onto the reconfigurable fabric by analyzing the computational load of different tasks, maximizing memory newlineviii newlineutilization. The Memory Mapping Algorithm, utilizing an energy- efficient load-aware dynamic, provides a robust solution to the issues posed by electricity machine systems. The successful integration has significant potential to enhance a generic variety of applications. newlineExperimental results reveal that the FPGA-based ELMM system achieves superior performance, exhibiting lower latency, minimal resource overhead, and reduced power consumption compared to existing approaches.
dc.description.note
dc.format.accompanyingmaterialDVD
dc.format.dimensionsA5
dc.format.extentvi, 193
dc.identifier.urihttp://hdl.handle.net/10603/594476
dc.languageEnglish
dc.publisher.institutionELECTRONICS DEPARTMENT
dc.publisher.placeChennai
dc.publisher.universitySathyabama Institute of Science and Technology
dc.relation
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.titleEnergy efficient load aware Dynamic Memory Management for System on Chip
dc.title.alternative
dc.type.degreePh.D.

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