Performance analysis and VLSI implementation of DWT architectures for image compression

dc.contributor.guide	Kumar, P
dc.coverage.spatial	Information and Communication Engineering
dc.creator.researcher	M, Nagabushanam
dc.date.accessioned	2017-11-16T04:58:25Z
dc.date.available	2017-11-16T04:58:25Z
dc.date.awarded	n.d.
dc.date.completed	2017
dc.date.registered	n.d.
dc.description.abstract	Abstract available
dc.description.note	Data not available
dc.format.accompanyingmaterial	None
dc.format.dimensions	29cm.
dc.format.extent	xx, 186p.
dc.identifier.uri	http://hdl.handle.net/10603/180940
dc.language	English US
dc.publisher.institution	Faculty of Information and Communication Engineering
dc.publisher.place	Chennai
dc.publisher.university	Anna University
dc.relation	172-185
dc.rights	university
dc.source.university	University
dc.subject.keyword	Algorithm
dc.subject.keyword	Analysis
dc.subject.keyword	Architectures
dc.subject.keyword	Image
dc.subject.keyword	Implementation
dc.title	Performance analysis and VLSI implementation of DWT architectures for image compression
dc.title.alternative
dc.type.degree	Ph.D.