Tunnel field effect transistors for ultra low power circuits design simulation and modeling

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dc.contributor.guideKumar, Mamidala Jagadesh
dc.coverage.spatialDepartment of Electrical Engineering
dc.creator.researcherAbdi, Dawit Burusie
dc.date.accessioned2024-05-20T11:25:15Z
dc.date.available2024-05-20T11:25:15Z
dc.date.awarded2016
dc.date.completed2016
dc.date.registeredNA
dc.description.abstractAbstract Available newline newline
dc.description.noteNA
dc.format.accompanyingmaterialDVD
dc.format.dimensionsNA
dc.format.extentNA
dc.identifier.urihttp://hdl.handle.net/10603/565069
dc.languageEnglish
dc.publisher.institutionDepartment of Electrical Engineering
dc.publisher.placeDelhi
dc.publisher.universityIndian Institute of Technology Delhi
dc.relationTH5135
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.titleTunnel field effect transistors for ultra low power circuits design simulation and modeling
dc.title.alternativeNa
dc.type.degreePh.D.

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