Design Methodology for OnChip Power Grid Interconnect AlML Perspective

dc.contributor.guide	Nandi, Sukumar and Trivedi, Gaurav
dc.coverage.spatial
dc.creator.researcher	Dey, Sukanta
dc.date.accessioned	2022-12-07T09:38:21Z
dc.date.available	2022-12-07T09:38:21Z
dc.date.awarded	2021
dc.date.completed	2021
dc.date.registered	2014
dc.description.abstract	Power Distribution has become a challenging issue in SystemonChip SoC design Generally a power grid network is created for the distribution of power from the power pads to ll the underlying functional blocks During the process of power distribution the power grid lines surfer from IR drop and electromigration EM issues Existing newlinemethods of designing power grid are timeconsuming as it checks for IR drop and EM violations over many iterations of the design cycle Therefore in this the
dc.description.note
dc.format.accompanyingmaterial	None
dc.format.dimensions
dc.format.extent
dc.identifier.uri	http://hdl.handle.net/10603/422160
dc.language	English
dc.publisher.institution	Department of Computer Science and Engineering
dc.publisher.place	Guwahati
dc.publisher.university	Indian Institute of Technology Guwahati
dc.relation
dc.rights	self
dc.source.university	University
dc.subject.keyword	Computer Science
dc.subject.keyword	Computer Science Hardware and Architecture
dc.subject.keyword	Engineering and Technology
dc.title	Design Methodology for OnChip Power Grid Interconnect AlML Perspective
dc.title.alternative
dc.type.degree	Ph.D.