Analysis of ferroelectric gate stack induced steep switching and negative differential resistance in mosfet for ultra low power applications

dc.contributor.guide	Kranti, Abhinav
dc.coverage.spatial	Electrical Engineering
dc.creator.researcher	Semwal, Sandeep
dc.date.accessioned	2024-02-08T09:08:34Z
dc.date.available	2024-02-08T09:08:34Z
dc.date.awarded	2023
dc.date.completed	2023
dc.date.registered	2019
dc.description.abstract	Available newline newline
dc.description.note	TH575
dc.format.accompanyingmaterial	DVD
dc.format.dimensions	30 cm
dc.format.extent	xxxviii, 207p.
dc.identifier.uri	http://hdl.handle.net/10603/544390
dc.language	English
dc.publisher.institution	Department of Electrical Engineering
dc.publisher.place	Indore
dc.publisher.university	Indian Institute of Technology Indore
dc.relation	NA
dc.rights	university
dc.source.university	University
dc.subject.keyword	Engineering
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Engineering Electrical and Electronic
dc.title	Analysis of ferroelectric gate stack induced steep switching and negative differential resistance in mosfet for ultra low power applications
dc.title.alternative	Na
dc.type.degree	Ph.D.