Certain investigations on improved hardware security constraints using logic obfuscation technique

dc.contributor.guideVijayachitra, S
dc.coverage.spatialCertain investigations on improved hardware security constraints using logic obfuscation technique
dc.creator.researcherBaluprithviraj, K N
dc.date.accessioned2021-07-30T13:49:44Z
dc.date.available2021-07-30T13:49:44Z
dc.date.awarded2020
dc.date.completed2020
dc.date.registered
dc.description.abstractHardware security has become an important topic for more researchers from related research domains joining in this field recently. Security of Integrated Circuits (ICs) has emerged as a significant concern at completely different level of IC life cycle, spanning design, test, fabrication and deployment. Recently developed ICs are becoming increasingly newlinevulnerable to various forms of security threats such as 1) illegal use of hardware Intellectual Property (IP) or IP Piracy , 2) illegal manufacturing of IC or IC Piracy , 3) insertion of malicious circuits, referred to as Hardware Trojan , in a design to cause in field circuit malfunction and 4) leakage of secret information from an IC. The economics of electronic manufacturing dictates widespread outsourcing of IC fabrication to off shore facilities, which increases the vulnerability to hardware attacks. In the present research, Novel hardware design approaches that incorporate a key based design obfuscation scheme to effectively protect a design against various security threats, while incurring low hardware and computational overheads are explored. Obfuscation is a technique that makes comprehending and Reverse Engineering (RE) a design difficult task. The effectiveness of the obfuscation based approaches for protection against IP reverse-engineering and piracy, hardware Trojan and information leakage is evaluated with benchmark circuits. Logic locking is a technique that has received significant attention. It has been effectively utilized for ensuring the function of digital circuits against IC theft. It protects a hardware design netlist from a variety of hardware security threats such as tampering, reverse engineering, and piracy, stemming from untrusted chip foundry and end-users. newline newline
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensions21cm
dc.format.extentxx,139p.
dc.identifier.urihttp://hdl.handle.net/10603/334182
dc.languageEnglish
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.relationp.127-138
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordHardware security
dc.subject.keywordSecurity of Integrated Circuits
dc.subject.keywordReverse Engineering
dc.titleCertain investigations on improved hardware security constraints using logic obfuscation technique
dc.title.alternative
dc.type.degreePh.D.

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