Runtime thermal management considering thermal coupling effects for chip multiprocessors

Abstract

Recent advancements in microprocessor design enable multiple newlineprocessors to embed on the same die. The large-scale integration of symmetric newlineor asymmetric processor architecture introduces a series of challenges. Foremost, newlinescaling the clock speed, current, and device density of the processor lead newlineto increased power densities. Further, uneven workload distribution causes newlinenon-uniform power distribution across the die surface. Power dissipation on newlinea chip is converted to heat, which causes localized heating resulting in the newlineformation of hotspots. This in turn can lead to circuit malfunction or failure, newlinereducing reliability and may result in performance throttling of the applications. newlineThus, dynamic thermal management (DTM) is essential to maintain a safe newlineoperating temperature and improve reliability while minimizing performance newlineloss. DTM encompasses various hardware and software techniques enabled at newlineruntime to control the processor temperature. newlineChip multiprocessor designed with a high degree of parallelism is used newlineextensively in embedded computers for high-performance and faster computing. newlineIn a thermally constrained processor, the sustained thermal hotspot can have a newlinelarger impact on the performance of compute-intensive tasks. Several thermal newlinemodels have explored ways to predict the temperature, which are exploited by the newlinedynamic thermal management mechanisms in the system. However, these models newlinerely on the training data set or repetitive application execution characteristics newlineand are not well-suited for long-term forecasts of the temperature. Predicting newlinethe core temperature multiple time steps into the future is vital to take proactive newlinethermal management decisions and poses significant challenges in a dynamically newlinechanging workload environment at run time. newline