Design approaches for mitigating reliability threats in MPSoC

Simple item page
dc.contributor.guideBhanumathi V
dc.coverage.spatialDesign approaches for mitigating reliability threats in MPSoC
dc.creator.researcherSatyaraji D
dc.date.accessioned2023-02-16T11:20:50Z
dc.date.available2023-02-16T11:20:50Z
dc.date.awarded2022
dc.date.completed2022
dc.date.registered
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensions21cm
dc.format.extentxvii,155p.
dc.identifier.urihttp://hdl.handle.net/10603/459151
dc.languageEnglish
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.relationp.143-154
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordCMOS VLSI Technology
dc.subject.keywordIntegrated Circuits
dc.subject.keywordMPSoC
dc.titleDesign approaches for mitigating reliability threats in MPSoC
dc.title.alternative
dc.type.degreePh.D.

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