Performance Analysis of Different MAC Unit Architectures for Low Power Signal Processing Applications

Abstract

Low power digital electronic devices are gaining increased popularity due its advantages of being handy, portable and compact. Most of those devices include various digital signal processing capabilities also. A unit that is responsible for providing certain digital signal processing competence and potentiality is the Multiply and Accumulate (MAC) unit. The unit performs multiplication and accumulation operation. It consists of a multiplier, an adder and an accumulator register which is a Parallel In Parallel Out (PIPO) register. MAC operation is one of the most important and frequent operations taking place in the Digital Signal Processor (DSP). newlinePower consumption is one of the key parameters that is being addressed in digital signal processing applications nowadays. The performance of the MAC unit enhances the performance of the DSP. It is very important and challenging to manage the power consumption in the MAC unit to develop a DSP with better power efficiency. The improvement in the power consumption of a MAC unit can be achieved by focusing on the adder block that lies in the critical path. Addition process is taking place in the multiplier and in the accumulation operation. A proper power efficient design for the adder section solves the problem of power management in the unit. newlineThe existing MAC architectures use a variety of multipliers like Modified Radix-2 Booth Multiplier, Array Multiplier, Ripple Carry Multiplier with Row Bypassing, Wallace Tree Multiplier and Dadda Multiplier. All these MAC architectures utilize conventional adder with carry save addition technique. The existing designs seem to have higher power consumption and higher Power-Delay Product (PDP) or the figure of merit, which will affect the performance of the MAC unit. With the objective of minimizing the power consumption and improving the figure of merit, a research study is carried out to observe the impact of a set of tree adders known as Parallel Prefix Adders (PPA) in their modified form on the MAC performance