HIGH SPEED LOW POWER DESIGN STRATEGIES WITH ANALYSIS FOR VLSI BASED MULTIPLIERS

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dc.contributor.guideDr. S. RAVI
dc.coverage.spatial
dc.creator.researcherP. VENKATESWARA RAO
dc.date.accessioned2016-10-17T06:26:39Z
dc.date.available2016-10-17T06:26:39Z
dc.date.awarded13.07.2011
dc.date.completed14.10.2010
dc.date.registered30.03.2007
dc.description.abstractnewline
dc.description.note
dc.format.accompanyingmaterialDVD
dc.format.dimensions
dc.format.extent
dc.identifier.urihttp://hdl.handle.net/10603/114153
dc.languageEnglish
dc.publisher.institutionDepartment of Electronics and Communication Engineering
dc.publisher.placeChennai
dc.publisher.universityDr. M.G.R. Educational and Research Institute
dc.relation
dc.rightsuniversity
dc.source.universityUniversity
dc.titleHIGH SPEED LOW POWER DESIGN STRATEGIES WITH ANALYSIS FOR VLSI BASED MULTIPLIERS
dc.title.alternative
dc.type.degreePh.D.

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