Analytical modeling simulation and optimization of triangular gate finfets for low power applications

dc.contributor.guideBalamurugan N B
dc.coverage.spatialAnalytical modeling simulation and optimization of triangular gate finfets for low power applications
dc.creator.researcherHemalatha M
dc.date.accessioned2025-11-24T11:55:40Z
dc.date.available2025-11-24T11:55:40Z
dc.date.awarded2025
dc.date.completed2025
dc.date.registered
dc.description.abstractOver the last fifty years, silicon CMOS technology has developed as newlineone of the most successful and promising technologies in the semiconductor, newlinemicroelectronics, and integrated circuit manufacturing sectors. To improve newlineperformance and address the Short Channel Effect (SCE), numerous newlinesemiconductor devices have been created, including MOSFETs, HEMTs, newlineFinFETs, TFETs, Nanosheet FETs, Nanowire FETs, and Carbon Nanotube newlineFETs. However, in terms of circuit performance and suppression of the short newlinechannel effect, Triangular Gate FinFETs outperform all other innovative newlinedesigns. Because of their excellent properties, FinFETs have become essential newlinecomponents of VLSI. newlineThe study focuses on creating and optimizing a numerical model for newlineTriangular Gate FinFETs utilizing the Linear Approximation Method (LAM). newlineThe study intends to assess important electrical properties such as drain current, newlinechannel potential, electric field, threshold voltage, subthreshold swing, and the newlineeffect of self-heating on device performance. To do this, numerical simulations newlineare performed using Sentaurus TCAD to validate the analytical results, and newlineMATLAB is utilized to model the equations produced from the LAM method. newlineNon-Dominated Genetic Algorithms and Pareto Active Learning approaches are newlineused to further enhance device attributes. newline
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensions21cm.
dc.format.extentxxvi,173p.
dc.identifier.researcherid
dc.identifier.urihttp://hdl.handle.net/10603/675915
dc.languageEnglish
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.relationp.163-172
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordCMOS technology
dc.subject.keywordComputer Science
dc.subject.keywordComputer Science Information Systems
dc.subject.keywordEngineering and Technology
dc.subject.keywordSemiconductor devices
dc.subject.keywordShort Channel Effect
dc.titleAnalytical modeling simulation and optimization of triangular gate finfets for low power applications
dc.title.alternative
dc.type.degreePh.D.

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