An approach towards the design of a controlled hardware architecture for fractal image compression
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Abstract
In this thesis we have basically addressed the problem associated with the fractal image
newlinecompression (FIC) that is mainly its time consuming problem. Fractal image compression gives
newlinehigh compression ratio but it consumes more time compare to other techniques. In this research
newlinework we have proposed different schemes to faster the process and reduce the time for both
newlinealgorithm and hardware solutions. We have also shown an approach to design controlled
newlinehardware architecture for the FIC. FIC now a dayand#8223;s become great field of interest among the
newlineresearchers working on the image compression or data compression. If properly utilized, it can
newlinegive highest compression ratio among the other technique. Its main principle of operation lies on
newlinethe self similarity as much as the similarity found the compression ratio will increase so we have
newlineto find the symmetry between the parts of the images. Once we got the symmetry then we do not
newlineneed to send the whole image rather we send the information about the symmetry. First image
newlinehas to be divided in range and domain block. Generally the domain block is twice as the size of
newlinerange block. Then we concatenated the domain block into range size block and apply the affine
newlinetransform to get the eight isometrics to find the similarity between rang block and the domain
newlineblock. So to find the encoded block or the compressed file it has to perform lots of range domain
newlinematching operation which leads to consume so much time. This is the main drawback of this
newlinetechnique and researchers give lots of importance on it. It has been observed from all the
newlinehardware approach to speed up the process that a dedicated hardware only can give the high
newlinespeed operations.
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