Theoretical modeling and simulation on the electron transport characteristics in nanoscale double gate MOSFETs

Abstract

We have presented a theoretical model based on two dimensional Poisson solver newlineto compute the transport characteristics in 22 nm channel double gate MOSFET. Carrier distribution was analysed using one dimensional cross-section of Fermi distribution functions at the source and drain contacts. Carrier injections from the source and drain contacts were computed by considering the effects of low and high-k gate dielectric layers. Next, drain current through the device is calculated with the effect of leakage in both ON and OFF conditions. Based on the fixed equivalent oxide thickness (EOT), the device is optimized to have better gate electrostatic control on the carrier flow and to reduce the leakage. To minimize the leakage furthermore, we have considered different combinational dielectric layers. Our findings show that the leakage through single dielectric layer is comparatively lesser than combinational dielectric layers. Hence, a single dielectric layer having higher dielectric constant and larger conduction band offset over silicon can be able to reduce leakage and maintain better electrostatic control compared to combinational layers with the same EOT. To analyse the device performance for designing analog and digital circuits, we have calculated drain induced barrier lowering (DIBL), intrinsic gain and ION/IOFF ratio for all single and combinational materials with and without the effect of EOT. The study can be utilized as a design tool for the selection of dielectric material in MOSFETs for minimizing leakage along with maintaining better device performance for circuit applications. However, the usage of high-k dielectric layers degrades the channel mobility which can be addressed by strain engineering using Si1-xmGexm layers. The transport characteristics are analysed in strained MOSFET by increasing the mole fraction of germanium. Through our study, we proposed useful information in improving carrier mobility, strong gate electrostatic control and reduced leakage. Next we have attempted.