Design and investigation of symmetric parallel fast finite impulse response filters

dc.contributor.guideNirmal singh N
dc.coverage.spatialDesign and investigation of symmetric parallel fast finite impulse response filters
dc.creator.researcherSolomon roach R
dc.date.accessioned2020-03-03T13:01:42Z
dc.date.available2020-03-03T13:01:42Z
dc.date.awarded30/08/2018
dc.date.completed2018
dc.date.registeredn.d.
dc.description.abstractIn the present scenario, the rapid growth of wireless newlinecommunication and multimedia applications increase the demand for newlineresource efficient, high throughput and low power Digital Signal Processing newline(DSP) systems. Finite Impulse Response (FIR) digital filters are the most newlinewidely used fundamental processing element in almost all DSP systems newlineranging from audio/video signal processing to wireless sensor networks. newlineHardware implementation of FIR filter requires a huge number of arithmetic newlineoperations that affect the speed and consumes more area and power. newlinePipelining and parallel processing are the two methods used in the DSP newlinesystems to reduce the dynamic power consumption. The parallel processing newlinetechnique increases the sampling rate of FIR filters which, in turn, increase newlinethe area due to the replication of processing blocks. Demand for high newlinesampling rate and reconfigurable parallel FIR filters with less area and low newlinepower increases in various communication system designs. Consequently, the newlinenumber of adders and multipliers used in the design of parallel FIR filters newlinealso increases gradually. The adders and the multipliers are the most area and newlinepower consuming datapath elements in the parallel FIR filters. The arithmetic newlinelevel reduction of power and area in parallel FIR filter is done by choosing newlineappropriate adders and multipliers. The parallel FIR filters are designed both newlinein fixed and reconfigurable configurations. Fast FIR Algorithms (FFAs) are used to reduce the number of multipliers in the subfilter blocks of parallel FIR filter realized using newlinepolyphase decomposition. Further, the number of multipliers is reduced newlineusing symmetric convolution methods in the subfilters with the additional newlinecost of adders/subtractors in pre and post processing block of the parallel FIR newline newline
dc.description.note
dc.format.accompanyingmaterialNone
dc.format.dimensions21cm
dc.format.extentxxii, 129 p.
dc.identifier.urihttp://hdl.handle.net/10603/279811
dc.languageEnglish
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.relationp.121-128
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering and Technology,Computer Science,Computer Science Information Systems
dc.subject.keywordFinite impulse
dc.subject.keywordfilters
dc.titleDesign and investigation of symmetric parallel fast finite impulse response filters
dc.title.alternative
dc.type.degreePh.D.

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