Concurrency Control and Deadlock Avoidance in Multi Core Architecture

dc.contributor.guide	Rajnish, Ranjana and Kumar, Pankaj
dc.coverage.spatial
dc.creator.researcher	Jafar, Sana
dc.date.accessioned	2022-11-11T04:56:35Z
dc.date.available	2022-11-11T04:56:35Z
dc.date.awarded	2021
dc.date.completed	2020
dc.date.registered
dc.description.abstract	newline
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent
dc.identifier.uri	http://hdl.handle.net/10603/418439
dc.language	English
dc.publisher.institution	Amity Institute of Information Technology Lucknow
dc.publisher.place	Noida
dc.publisher.university	Amity University, Noida
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Computer Science
dc.subject.keyword	Computer Science Interdisciplinary Applications
dc.subject.keyword	Concurrency Control
dc.subject.keyword	Deadlock Avoidance
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Multi Core Architecture
dc.title	Concurrency Control and Deadlock Avoidance in Multi Core Architecture
dc.title.alternative
dc.type.degree	Ph.D.