Design and Development of Filters for Image De noising in Video Processing Application

Abstract

iii newlineABSTRACT newlineThe problem that is attempted to be tackled in this thesis is to eliminate the newlineunwanted signals that have crept into the image and to bring out the original information newlinein a suitable form.The objectives of this thesis are: newline1.To design and develop a de-noising algorithm, newline2. To implement a filter to reduce the random value impulse noise and newline3. To develop a filter for real time impulse noise suppression. newlineThe aim of the proposed work is designing and implementing the FPGA newlinehardware based algorithm for de-noising and 98% efficiency of noise reduction factor for newline90% corrupted image in achieved.The adopted median filter is designed using Verilog newlineHDL and MATLAB.The total of 1047 logic elements is consumed by the adopted median newlinefilter at a frequency of 140.15MHZ. Further, a fuzzy logic technique is used to restore the newlinegray scale images. newlineTo restore gray scale and colour images a hardware implementation of the median newlinefilter using Dynamic partial reconfiguration technique is proposed and better results are newlineachieved.The research is limited with analysis of images using only one type of noise newlinenamely impulse noise but with in-depth analysis and there is much more scope for newlineanalysing and tackling other types of noises.The results obtained in the methods newlineproposed in this thesis are compared with the results of earlier methods and comparative newlinestatements are furnished to study the Quality Metrics and Performance Measures of the newlineproposed filter. newline