Efficient optimization techniques for synthesis of topology and sizing analog circuits

dc.contributor.guide	Duraiswamy, K.
dc.coverage.spatial	Information and Communication Engineering
dc.creator.researcher	Premkumar, P.
dc.date.accessioned	2017-04-03T11:23:15Z
dc.date.available	2017-04-03T11:23:15Z
dc.date.awarded	n.d.
dc.date.completed	december, 2014
dc.date.registered	n.d.
dc.description.abstract	Abstract available
dc.description.note	Data not available
dc.format.accompanyingmaterial	None
dc.format.dimensions	30
dc.format.extent	xxi, 143p.
dc.identifier.uri	http://hdl.handle.net/10603/143970
dc.language	English
dc.publisher.institution	Faculty of Information and Communication Engineering
dc.publisher.place	Chennai
dc.publisher.university	Anna University
dc.relation	126-142
dc.rights	university
dc.source.university	University
dc.subject.keyword	Circuit
dc.subject.keyword	Genetic
dc.subject.keyword	Heuristic
dc.subject.keyword	Synthesis
dc.subject.keyword	Topology
dc.title	Efficient optimization techniques for synthesis of topology and sizing analog circuits
dc.title.alternative
dc.type.degree	Ph.D.