Performance investigation and characteristics analysis of hybrid radix fft processor in 5g and biomedical application

Abstract

The signals in the real world are mostly analog. Processing the analog newlinesignal is difficult as immunity to noise is less. Due to tremendous changes in newlinethe application requirement the analog signals are converted into digital form newlineand uses Digital Signal Processing (DSP). Discrete Fourier Transform (DFT) newlineis a signal processing unit used for signal transmission and analysis. It is not newlineimplemented in practical application because of its high computation newlinecomplexity. Introduction of Fast Fourier Transform (FFT) has extended the newlineability to implement Fourier methods in digital computers. FFT hold diverse newlineapplications in wireless communication, digital signal processing, medical newlineimaging. FFT speeds up the calculation of DFT. The FFT is built by butterfly newlineunit with complex adder, subtractor and multiplier. Owing to twiddle factor newlinemultiplication, traditional FFT occupies large chip area and delay. FFT is a newlinecomputationally sophisticated algorithm with lot of multiplications that newlineconsumes large amount of dynamic power. The battery life of portable device newlineis affected by high power consumption. Hence, it is important to reduce the newlineconsumption power of FFT processor. In order to get rid the disadvantages of newlinetraditional FFT, an optimizing FFT with requisite number of adders, newlinemultipliers and memory module is chosen. newlineThe first phase of this research is to provide area efficient multipliers newlinefor high-speed processor based on radix 2 FFT. Modified Wallace Tree (WT) newlinemultiplier with WT algorithm is an ideal choice. The speed of the system is newlineincreased by reducing the partial products in multiplication by combining the newlineproducts using addition operation.