Performance Evaluation of Low Leakage SRAM Cell with Sense Amplifier Circuit
| dc.contributor.guide | Tomar, V K | |
| dc.coverage.spatial | ||
| dc.creator.researcher | Sachdeva, Ashish | |
| dc.date.accessioned | 2021-12-28T05:57:58Z | |
| dc.date.available | 2021-12-28T05:57:58Z | |
| dc.date.awarded | 2021 | |
| dc.date.completed | 2021 | |
| dc.date.registered | 2015 | |
| dc.description.abstract | newline | |
| dc.description.note | ||
| dc.format.accompanyingmaterial | CD | |
| dc.format.dimensions | ||
| dc.format.extent | xvii+116p. | |
| dc.identifier.uri | http://hdl.handle.net/10603/352958 | |
| dc.language | English | |
| dc.publisher.institution | Department of Electronics and Communications | |
| dc.publisher.place | Mathura | |
| dc.publisher.university | GLA University | |
| dc.relation | ||
| dc.rights | self | |
| dc.source.university | University | |
| dc.subject.keyword | Engineering and Technology | |
| dc.title | Performance Evaluation of Low Leakage SRAM Cell with Sense Amplifier Circuit | |
| dc.title.alternative | ||
| dc.type.degree | Ph.D. |
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