Investigations on performance of multilevel inverter topologies for medium power applications

dc.contributor.guide	Karthikeyan, T
dc.coverage.spatial	Electrical and Electronics Engineering
dc.creator.researcher	A, Rathinam
dc.date.accessioned	2018-03-15T12:15:29Z
dc.date.available	2018-03-15T12:15:29Z
dc.date.awarded	n.d.
dc.date.completed	2016
dc.date.registered	n.d.
dc.description.abstract	Abstract available
dc.description.note	Data not available
dc.format.accompanyingmaterial	None
dc.format.dimensions	8cm.
dc.format.extent	xxiv, 159p.
dc.identifier.uri	http://hdl.handle.net/10603/196219
dc.language	English
dc.publisher.institution	Faculty of Electrical and Electronics Engineering
dc.publisher.place	Chennai
dc.publisher.university	Anna University
dc.relation	144-158
dc.rights	university
dc.source.university	University
dc.subject.keyword	Cascaded
dc.subject.keyword	Circuit
dc.subject.keyword	Diode
dc.subject.keyword	Hybrid
dc.subject.keyword	Synchronous
dc.title	Investigations on performance of multilevel inverter topologies for medium power applications
dc.type.degree	Ph.D.