Architectural strategies for hand posture recognition in systems on chip

dc.contributor.guide	Lall, Brejesh and Saha, Kaushik
dc.coverage.spatial	Department of Electrical Engineering
dc.creator.researcher	Mahesh Chandra
dc.date.accessioned	2024-05-02T04:27:34Z
dc.date.available	2024-05-02T04:27:34Z
dc.date.awarded	2017
dc.date.completed	2017
dc.date.registered	NA
dc.description.abstract	Abstract Available newline newline
dc.description.note	NA
dc.format.accompanyingmaterial	DVD
dc.format.dimensions	NA
dc.format.extent	NA
dc.identifier.uri	http://hdl.handle.net/10603/562165
dc.language	English
dc.publisher.institution	Department of Electrical Engineering
dc.publisher.place	Delhi
dc.publisher.university	Indian Institute of Technology Delhi
dc.relation	TH5386
dc.rights	university
dc.source.university	University
dc.subject.keyword	Engineering
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Engineering Electrical and Electronic
dc.title	Architectural strategies for hand posture recognition in systems on chip
dc.title.alternative	Na
dc.type.degree	Ph.D.