Some studies on a parallel protocol verification system and its performance prediction using timing schema

dc.contributor.guide	Das, P. K. and Saha, Debashis
dc.coverage.spatial
dc.creator.researcher	Dutta, Sourav Kumar
dc.date.accessioned	2022-02-18T05:32:51Z
dc.date.available	2022-02-18T05:32:51Z
dc.date.awarded
dc.date.completed	2000
dc.date.registered
dc.description.abstract	newline
dc.description.note
dc.format.accompanyingmaterial	None
dc.format.dimensions
dc.format.extent	214p.
dc.identifier.uri	http://hdl.handle.net/10603/363640
dc.language	English
dc.publisher.institution	Department of Computer Science and Engineering
dc.publisher.place	Kolkata
dc.publisher.university	Jadavpur University
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	CFSM (Communicating Finite State Machine)
dc.subject.keyword	Protocol Verification System
dc.subject.keyword	Timing Schema
dc.title	Some studies on a parallel protocol verification system and its performance prediction using timing schema
dc.title.alternative
dc.type.degree	Ph.D.