Design Modeling and Simulation of Nano Scale Finfet for Rf Application

Abstract

This research contributes to the understanding of device performance in SOI FinFETs for RF applications, providing valuable insights for optimizing device design to meet specific application requirements. newlineThe analysis underscores the significance of size variation in SOI FinFETs, with larger devices excelling in current drivability and smaller devices mitigating short­channel effects (SCEs) for improved robustness. Validation against numerical solutions from a 2-D device simulator confirms the accuracy of the obtained results. newlineThis thesis delves into the challenges and advancements in semiconductor technology, focusing on the limitations of conventional devices and the emergence of novel structures such as dual material gate transistors, junctionless transistors, and FinFETs. Chapter 1 introduces the importance of device simulation in understanding and optimizing nano device characteristics before fabrication, discussing various numerical simulation models and methods. Chapter 2 provides a literature survey on silicon on insulator (SOI) FinFETs, identifying research gaps in modeling and simulation. It sets the stage for Chapters 3 and 4, which detail the design, simulation, and performance evaluation of SOI FinFET structures for high-performance analog and radio frequency (RF) parameter newline