Performance Analysis of MLGNR as VLSI Interconnects
| dc.contributor.guide | Rai, Mayank Kumar and Khanna, Rajesh | |
| dc.coverage.spatial | ||
| dc.creator.researcher | Kaur, Tajinder | |
| dc.date.accessioned | 2022-12-08T12:14:28Z | |
| dc.date.available | 2022-12-08T12:14:28Z | |
| dc.date.awarded | 2021 | |
| dc.date.completed | 2021 | |
| dc.date.registered | ||
| dc.description.abstract | Due to rapid scaling of interconnect dimensions and increased operational frequencies of integrated Circuits (ICs) in the deep submicron (DSM) regime, the lateral and vertical dimensions of on-chip interconnects are reduced and approached the mean-free path of electron, which is about 40 nm for copper (Cu) at room temperature. Therefore, the on-chip interconnect delay dominates over the device delay due to its excessive values of equivalent electrical parameters (e.g. R, L and C) in highperformance very large-scale integrated (VLSI) circuits. The increasing resistivity of Cu (due to size effects) together with its low current density (~106 A/cm2) have resulted in its degraded interconnect performance in terms of delay, power dissipation and crosstalk. Hence, the semiconductor industries are looking for an alternative to Cu in the DSM regime. Additionally, it has become essential to find a material that is appropriate for potential on-chip interconnect applications to design a high-performance ICs.Multilayer graphene nanoribbon (MLGNR) viz. a graphene-based carbon nanomaterial has emerged as a potential interconnect material. Graphene that recently drawn considerable attention as a possible alternative for interconnects in the developments of next-generation ICs, which exhibits outstanding physical, mechanical, thermal and electrical properties. Therefore, MLGNR based interconnects have been proposed as the most promising alternative to Cu interconnects at DSM technology nodes. The present work studied the impact of temperature on the performance analysis of capacitively coupled MLGNR interconnects in terms of propagation-delay, power dissipation, power-delay-product (PDP), dynamic crosstalk, functional crosstalk and frequency-spectrum of crosstalk-induced noise at a technology node of 14 nm. | |
| dc.description.note | ||
| dc.format.accompanyingmaterial | None | |
| dc.format.dimensions | ||
| dc.format.extent | 124p. | |
| dc.identifier.uri | http://hdl.handle.net/10603/423166 | |
| dc.language | English | |
| dc.publisher.institution | Department of Electronics and Communication Engineering | |
| dc.publisher.place | Patiala | |
| dc.publisher.university | Thapar Institute of Engineering and Technology | |
| dc.relation | ||
| dc.rights | university | |
| dc.source.university | University | |
| dc.subject.keyword | Engineering | |
| dc.subject.keyword | Engineering and Technology | |
| dc.subject.keyword | Engineering Electrical and Electronic | |
| dc.title | Performance Analysis of MLGNR as VLSI Interconnects | |
| dc.title.alternative | ||
| dc.type.degree | Ph.D. |
Files
Original bundle
1 - 5 of 13
Loading...
- Name:
- 01_title.pdf
- Size:
- 215.38 KB
- Format:
- Adobe Portable Document Format
- Description:
- Attached File
License bundle
1 - 1 of 1