Circuit Level Design Models For Minimizing Leakage Current Using the Relation Between Threshold Voltage and Source to Body Voltage

dc.contributor.guide	Manjunatha Chari K and Lal Kishore K
dc.coverage.spatial
dc.creator.researcher	Masood Ahmad Mahammad
dc.date.accessioned	2025-01-13T07:55:22Z
dc.date.available	2025-01-13T07:55:22Z
dc.date.awarded	2020
dc.date.completed	2020
dc.date.registered	2011
dc.description.abstract	Attached newline
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent	156 pp.
dc.identifier.researcherid
dc.identifier.uri	http://hdl.handle.net/10603/614474
dc.language	English
dc.publisher.institution	Department of Electronics and Communication Engineering
dc.publisher.place	Kukatpally
dc.publisher.university	Jawaharlal Nehru Technological University, Hyderabad
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Circuit Level Design Models
dc.subject.keyword	Mosfet Leakage Analysis
dc.subject.keyword	Reverse Body Bias Technique
dc.subject.keyword	Threshold Voltage
dc.title	Circuit Level Design Models For Minimizing Leakage Current Using the Relation Between Threshold Voltage and Source to Body Voltage
dc.title.alternative
dc.type.degree	Ph.D.