Low power aging aware techniques for digital circuits

dc.contributor.guide	Tiwari, R. K. and Pattanaik, Manisha
dc.coverage.spatial	Electronics
dc.creator.researcher	Pandey, Vartika
dc.date.accessioned	2022-08-24T08:35:46Z
dc.date.available	2022-08-24T08:35:46Z
dc.date.awarded	2022
dc.date.completed	2021
dc.date.registered	2018
dc.description.abstract	None newline
dc.description.note	Summary-1-15 p.
dc.format.accompanyingmaterial	CD
dc.format.dimensions	35 cm.
dc.format.extent	102 p.
dc.identifier.uri	http://hdl.handle.net/10603/400776
dc.language	English
dc.publisher.institution	School of Studies in Electronics
dc.publisher.place	Gwalior
dc.publisher.university	Jiwaji University
dc.relation	Bibliography-93-102 p.
dc.rights	university
dc.source.university	University
dc.subject.keyword	Electronics
dc.subject.keyword	Physical Sciences
dc.title	Low power aging aware techniques for digital circuits
dc.title.alternative	-
dc.type.degree	Ph.D.