Design of Power Optimized Level Converters

dc.contributor.guide	Raju B L and Chenna Kesava Reddy K
dc.coverage.spatial
dc.creator.researcher	Rajesh A
dc.date.accessioned	2025-01-13T07:26:59Z
dc.date.available	2025-01-13T07:26:59Z
dc.date.awarded	2024
dc.date.completed	2024
dc.date.registered	2012
dc.description.abstract	Attached
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent	72pp.
dc.identifier.researcherid
dc.identifier.uri	http://hdl.handle.net/10603/614470
dc.language	English
dc.publisher.institution	Department of Electronics and Communication Engineering
dc.publisher.place	Kukatpally
dc.publisher.university	Jawaharlal Nehru Technological University, Hyderabad
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	BPSK Transceiver
dc.subject.keyword	Engineering
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Engineering Electrical and Electronic
dc.subject.keyword	Level Converters
dc.subject.keyword	Power Optimization
dc.title	Design of Power Optimized Level Converters
dc.title.alternative
dc.type.degree	Ph.D.