Some test strategies for 3D integrated circuits

dc.contributor.guide	Biswas, G P
dc.coverage.spatial
dc.creator.researcher	Kaibartta, Tanusree
dc.date.accessioned	2023-01-20T08:23:14Z
dc.date.available	2023-01-20T08:23:14Z
dc.date.awarded	2022
dc.date.completed	2022
dc.date.registered	2018
dc.description.abstract	Available newline
dc.description.note
dc.format.accompanyingmaterial	None
dc.format.dimensions
dc.format.extent
dc.identifier.uri	http://hdl.handle.net/10603/450747
dc.language	English
dc.publisher.institution	Department of Computer Science and Engineering
dc.publisher.place	Dhanbad
dc.publisher.university	Indian Institute of Technology (ISM), Dhanbad
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Computer Science
dc.subject.keyword	Computer Science Software Engineering
dc.subject.keyword	Engineering and Technology
dc.title	Some test strategies for 3D integrated circuits
dc.title.alternative
dc.type.degree	Ph.D.