Computational Analysis Of Novel Dual Tail Comparator To Reduce The Power Consumption And Compare With Conventional Comparator

Abstract

Abstract newlineAnalog-to-Digital Converters (ADCs) and Digital-to-Analog converters newline(DACs) are important newline components in modern microelectronics newlineapplications that require an interface between the analogue and progressive newlinedigital signal processing worlds. Nowadays consumer electronics, medical newlineequipment, communication and newline instrumentation applications, are newlinecurrent growing areas. With the rapid newline development of CMOS newlinetechnology, more and more signal processing circuits and building newline newlineblocks are being implemented in the digital domain for cheaper cost, lower newlinepower consumption, higher yield, and greater reconfigurability. It newlineis implemented to digital and analogue blocks into newline one chip with newlineadditional ADCs or DACs. Newline Analog circuits such as voltage newline newlinereference and operational amplifiers, as well as mixed signal circuits such as newlinecomparators, are the basic building blocks of ADCs and DACs. The different single comparator, usually referred to as a 1-bit ADC, is newlinefrequently present in newline ADCs. The comparator is utilized in various newlineapplications, including high-speed wireless and wire line newline newlinecommunication systems, memory, relaxation oscillators, null detectors, zero- crossing detectors, newline peak detectors, switching power regulators, and newlinenew generation VLSI logic circuits. Compared to another logic style, the Pseudo NMOS logic style has newlinelower power consumption and less delay. Transistor count has been observed newlineto be lower in modified pseudo-n mos type designs than in other logic style newlinedesigns. The power consumption of the comparator is 1.104854e-004 watts newlinecompared to the dual tail and double tail comparator. In this simulation of the newlineproposed comparator a 180nm CMOS technology consumes the power of newline69and#956;W at 1.2v Ac power supply voltage. The proposed circuit is a low-offset newlinelow-power high-speed comparator which works at a wide input common-mode newlinevoltage range. Relays with a built-in time delay have that capability.