Design of area and power efficient hybrid crypto processor for steganography in MIMO OFDM networks

Abstract

Medical records include a patient s medical history, diagnostic test newlineresults, clinical findings, pre and postoperative treatment, medication and newlineprogress. Health care practitioners can employ modern technology to newlineexchange patient medical records on servers via the internet, allowing newlinethem to view patient data from anywhere and deliver better treatment. newlineMedical records are incredibly valuable to hackers and have various black newlinemarket uses. To secure wireless communications, the HCP was newlinedeveloped, which uses flexible encryption and signature algorithms. In newlineHCP two cryptography algorithms are clubbed to provide efficient newlinesecurity. Implementation of cryptography algorithms in hardware such as newlinethe FPGA platform plays a vital role in providing security in order to newlinetackle these challenges. The design and hardware implementation of newlineFPGA in terms of size, power and throughput is a fundamental challenge newlinein cryptography. newlineThe planned HCP s hardware is built on the Signcryption platform. newlineIn public key cryptography, signcryption is a novel idea. It can deliver newlineboth digital signature and encryption at the same time. To address these newlineconcerns, effective steganography approaches are employed to conceal newlinevi newlinedata beyond a doubt. The ECC and blockchain encryption combined to newlineprovide an efficient steganography solution for MIMO-OFDM channels. newlineThe proposed HCP design uses an equal number of hardware or newlineis quite higher than a single ECC design for m=163 bits. Elliptic curve newlinecryptography is public key cryptography technique.The platform virtex in newline4, 5 and 7 gives the device utilization number of slices about 12973, 4454 newlineand 4553 in HCP design. The HCP of 163 bits in the platform of virtex 4, newline5 and 7 denotes the maximum frequency of about 221 MHz, 231 MHz newlineand 373.756 MHz. The proposed hybrid architecture achieves maximum newlineclock operating frequency compared to existing designs. The power newlineanalysis of HCP in 163 bits in virtex platforms 4, 5 and 7 denotes the newlinepower consumption of 102mW, 109mW and 127mW respectively.