Analysis of memory architecture of parallel processing computer

Abstract

In modern time the focus of parallel computer development is being shifted from the processor perspective to the memory system perspective. If we will go to the Moore’s law, we will find the reason, which says that the performance of processor generally doubled in every year, whereas in recent year the performance of memory is increasing minutely, which causes an increasing discrepancy between processor & memory. So it becomes necessary to design a principle for memory architecture of parallel computer. Lots of memory architecture for parallel computer are designed so for. The research gives an extensive view of different memory architecture used in parallel computer; mainly it covers shared memory. After analyzing different memory architecture for shared memory abstraction, we choose Distributed Shared Memory (DSM) architecture for our research work. The performance and the programmability of the DSM system depend upon the Memory Consistency Model and Memory Coherency. The memory consistency model of a DSM system specifies the ordering constraints on concurrent memory accesses by multiple processors. Lots of Consistency Model are defined by a wide variety of source including architecture system, application programmer etc.