Design and Development of Jitter Measurement Circuit for High Speed SerDes System using 65 nm CMOS Process

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dc.contributor.guideBhattacharyya, T K
dc.coverage.spatial
dc.creator.researcherSarangi, Santunu
dc.date.accessioned2023-07-03T10:19:57Z
dc.date.available2023-07-03T10:19:57Z
dc.date.awarded2022
dc.date.completed2022
dc.date.registered
dc.description.abstractnewline
dc.description.note
dc.format.accompanyingmaterialDVD
dc.format.dimensions
dc.format.extent
dc.identifier.urihttp://hdl.handle.net/10603/496246
dc.languageEnglish
dc.publisher.institutionElectronics and Electrical Communication Engg
dc.publisher.placeKharagpur
dc.publisher.universityIndian Institute of Technology Kharagpur
dc.relation
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.titleDesign and Development of Jitter Measurement Circuit for High Speed SerDes System using 65 nm CMOS Process
dc.title.alternative
dc.type.degreePh.D.

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