Enriched architecture of low power fft processor for the ofdma transceiver in wireless communication networks

Abstract

Orthogonal frequency-division multiplexing (OFDM) is a scheme used in traditional FDM systems applicable for transmission over a dispersive channel. It generally follows a frequency division multiplexing (FDM) scheme which is utilized in modulation method with multiple digital carriers. The data are splitted into more than one parallel data channels. Every data is allotted with one sub-carrier. The orthogonal subcarrier is closely spaced and enables in transferring the data. Each sub-carrier undergoes traditional modulation schemes together with phase shift keying or quadrature amplitude modulation techniques to perform modulation. Typically its miles accomplished at a low symbol rate with the aid of retaining total data rates as like the data rate of existing single carrier modulation schemes under identical bandwidth. OFDM is a modulation era followed widely in several new and emerging wireless and wired communication systems. OFDM offers exquisite advantages of robustness with high spectral efficiency against to the inter symbol and inter carrier interference. In this proposed work, a Novel transceiver of an OFDM is presented and it is implemented on FPGA. Moreover, pipelined FFT /IFFT architecture is adopted to minimize the area and circuit complexity. The main aim of the proposed design is to optimize the speed and area at less operating frequency