Efficient Hardware Architectures for Error Correcting Codes Applicable to Data Storage

Abstract

Error correcting codes (ECCs) are essential to transmission and data storage sys-tems to protect the information from errors introduced by noisy communication channels. There are two main classes of ECCs, namely algebraic and iterative ECCs. While iterative ECCs like low-density parity-check (LDPC) codes provide improved performance in the waterfall region albeit exhibiting flooring effect for not so well-designed codes, algebraic ECCs like Bose Chaudhuri Hocquenghem (BCH) and Reed Solomon (RS) codes provide guaranteed error correction capability irrespective of the waterfall or error floor regions. Due to recent advancements in higher-dimensional data storage technologies like shingled and 2-D magnetic recording (TDMR), 3-DNAND flash memories, and holographic memories, native 2-Dsignal processing and coding techniques are re-quired to overcome inter-symbol interference (ISI) and noise leading to 2-Dburst and random errors. With high data densities beyond 2 Tb/in2 in practical TDMR channels, reliable information storage and retrieval require highly efficient ECCs. The primary motivation of this dissertation is to design efficient hardware architectures for error correcting codes pertaining to 1-Dand 2-Dstorage channels. The focus topics are as follows: (i) First, we designed a high-throughput 1-DLDPC decoder using layered and non-layered min-sum algorithm based on non-uniform quantization on a field programmable gate array (FPGA) kit. Unlike the standard state-of-the-art uniform quantization used in virtually all decoder circuits, our non-uniform quantization technique achieves a slight performance improvement in the signal-to-noise ratio (SNR) using the same bit budget as the uniform case. Using 1 bit lesser than uniform quantization, it yields area savings for the block RAMs used for storing intermediate check node and variable node messages. (ii) We proposed efficient encoding and decoding hardware architectures for (n,k), t-error correcting BCH product codes in the frequency domain. Using the properties of...