Ultra low power and high performance full adder design

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dc.contributor.guideSingh, B Pen_US
dc.coverage.spatialElectronics and communicationen_US
dc.creator.researcherSharma, Triptien_US
dc.date.accessioned2014-05-08T12:07:43Z
dc.date.available2014-05-08T12:07:43Z
dc.date.awarded2013en_US
dc.date.completedDecember, 2012en_US
dc.date.issued2014-05-08
dc.date.registeredn.d.en_US
dc.description.abstractIncludeden_US
dc.description.noteReferences p. 132-137, Appendix p. 138-176en_US
dc.format.accompanyingmaterialNoneen_US
dc.format.dimensions--en_US
dc.format.extent176p.en_US
dc.identifier.urihttp://hdl.handle.net/10603/18306
dc.languageEnglishen_US
dc.publisher.institutionDepartment of Electronics and Communicationen_US
dc.publisher.placeJaipuren_US
dc.publisher.universitySuresh Gyan Vihar Universityen_US
dc.relation51en_US
dc.rightsuniversityen_US
dc.source.inflibnetINFLIBNETen_US
dc.subject.keywordElectronics and communicationen_US
dc.titleUltra low power and high performance full adder designen_US
dc.title.alternativeen_US
dc.type.degreePh.D.en_US

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