Analysis Of Gate All Around Stacked Nanosheet Thin Film Transistors Gaa Snstft For Low Power Applications

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dc.contributor.guideP. Sivakumar
dc.coverage.spatial
dc.creator.researcherJenyfal Sampson
dc.date.accessioned2023-07-05T11:50:05Z
dc.date.available2023-07-05T11:50:05Z
dc.date.awarded2018
dc.date.completed2018
dc.date.registered2014
dc.description.abstractnewline
dc.description.note
dc.format.accompanyingmaterialDVD
dc.format.dimensions
dc.format.extent
dc.identifier.urihttp://hdl.handle.net/10603/496878
dc.languageEnglish
dc.publisher.institutionDepartment of Electronics and Communication Engineering
dc.publisher.placeVirudhunagar
dc.publisher.universityKalasalingam University
dc.relation
dc.rightsuniversity
dc.source.universityUniversity
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.titleAnalysis Of Gate All Around Stacked Nanosheet Thin Film Transistors Gaa Snstft For Low Power Applications
dc.title.alternativeAnalysis Of Gate All Around Stacked Nanosheet Thin Film Transistors Gaa Snstft For Low Power Applications
dc.type.degreePh.D.

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