Logic synthesis and verification of advance digital circuits in next generation cyber physical systems

dc.contributor.guide	Srivastava, Asutosh
dc.coverage.spatial
dc.creator.researcher	Kumar, Jitendra
dc.date.accessioned	2024-04-08T11:23:08Z
dc.date.available	2024-04-08T11:23:08Z
dc.date.awarded	2023
dc.date.completed	2022
dc.date.registered
dc.description.abstract	newline
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent	ix, 209
dc.identifier.uri	http://hdl.handle.net/10603/556804
dc.language	English
dc.publisher.institution	School of Computer and System Science
dc.publisher.place	Delhi
dc.publisher.university	Jawaharlal Nehru University
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Computer Science Cybernetics
dc.subject.keyword	Generation cyber physical systems
dc.subject.keyword	Verification of advance digital circuits
dc.title	Logic synthesis and verification of advance digital circuits in next generation cyber physical systems
dc.title.alternative
dc.type.degree	Ph.D.