Design and Optimization of Junctionless Accumulation Mode Gate Stack Gate All Around FinFET for RF and Biosensor  Applications

dc.contributor.guide	Chaujar, Rishu
dc.coverage.spatial
dc.creator.researcher	Kumar, Bhavya
dc.date.accessioned	2024-05-03T08:45:30Z
dc.date.available	2024-05-03T08:45:30Z
dc.date.awarded	2023
dc.date.completed	2023
dc.date.registered	2018
dc.description.abstract	Available newline
dc.description.note
dc.format.accompanyingmaterial	None
dc.format.dimensions	210 x 297 mm
dc.format.extent	xxi, 174p
dc.identifier.uri	http://hdl.handle.net/10603/562813
dc.language	English
dc.publisher.institution	Applied Physics
dc.publisher.place	Delhi
dc.publisher.university	Delhi Technological University
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Physical Sciences
dc.subject.keyword	Physics
dc.subject.keyword	Physics Applied
dc.title	Design and Optimization of Junctionless Accumulation Mode Gate Stack Gate All Around FinFET for RF and Biosensor Applications
dc.title.alternative
dc.type.degree	Ph.D.