A configurable dual crossbar router architecture for network on chip in field programmable gate arrays

dc.contributor.guide	Arokiasamy, A
dc.coverage.spatial	Information and Communication Engineering
dc.creator.researcher	V, Saraswathi
dc.date.accessioned	2018-03-15T11:36:02Z
dc.date.available	2018-03-15T11:36:02Z
dc.date.awarded	n.d.
dc.date.completed	2016
dc.date.registered	n.d.
dc.description.abstract	Abstract available
dc.description.note	Data not available
dc.format.accompanyingmaterial	None
dc.format.dimensions	6cm.
dc.format.extent	xxvi, 114p.
dc.identifier.uri	http://hdl.handle.net/10603/196000
dc.language	Others
dc.publisher.institution	Faculty of Information and Communication Engineering
dc.publisher.place	Chennai
dc.publisher.university	Anna University
dc.relation	109-113
dc.rights	university
dc.source.university	University
dc.subject.keyword	Adaptive
dc.subject.keyword	Allocator
dc.subject.keyword	Crossbar
dc.subject.keyword	Synthesis
dc.subject.keyword	Topologies
dc.title	A configurable dual crossbar router architecture for network on chip in field programmable gate arrays
dc.title.alternative
dc.type.degree	Ph.D.