Design and Implementation of Efficient FPGA based Hardware Architectures for Improved Reversible Watermarking Algorithms

dc.contributor.guide	Sunaniya, Arun Kr
dc.coverage.spatial
dc.creator.researcher	Das, Subhajit
dc.date.accessioned	2023-01-11T09:03:47Z
dc.date.available	2023-01-11T09:03:47Z
dc.date.awarded	2022
dc.date.completed	2022
dc.date.registered	2017
dc.description.abstract	newline
dc.description.note
dc.format.accompanyingmaterial	DVD
dc.format.dimensions
dc.format.extent
dc.identifier.uri	http://hdl.handle.net/10603/442212
dc.language	English
dc.publisher.institution	Electronics and Instrumentation Engineering
dc.publisher.place	Silchar
dc.publisher.university	National Institute of Technology Silchar
dc.relation
dc.rights	university
dc.source.university	University
dc.subject.keyword	Engineering
dc.subject.keyword	Engineering and Technology
dc.subject.keyword	Instruments and Instrumentation
dc.title	Design and Implementation of Efficient FPGA based Hardware Architectures for Improved Reversible Watermarking Algorithms
dc.title.alternative
dc.type.degree	Ph.D.