Low power methodologies fro clock  generation and distribution

dc.contributor.guide	Kittur, Harish M
dc.coverage.spatial	Electronic Engineering
dc.creator.researcher	Reuben, John
dc.date.accessioned	2016-10-19T06:20:49Z
dc.date.available	2016-10-19T06:20:49Z
dc.date.awarded	n.d.
dc.date.completed	2015
dc.date.registered	n.d.
dc.description.abstract	Abstract available
dc.description.note	Appendix p.112-125 and reference p.126-131
dc.format.accompanyingmaterial	None
dc.format.dimensions	-
dc.format.extent	131p.
dc.identifier.uri	http://hdl.handle.net/10603/117846
dc.language	English
dc.publisher.institution	School of Electronic Engineering
dc.publisher.place	Vellore
dc.publisher.university	VIT University
dc.relation	-
dc.rights	university
dc.source.inflibnet	INFLIBNET
dc.subject.keyword	Clock
dc.subject.keyword	Low power
dc.subject.keyword	Methodologies
dc.title	Low power methodologies fro clock generation and distribution
dc.title.alternative	-
dc.type.degree	Ph.D.