Design of built in self test and repair scheme for static random access memory

dc.contributor.guide	Jinaga B C
dc.creator.researcher	Asha rani M
dc.date.accessioned	2018-02-16T05:20:26Z
dc.date.available	2018-02-16T05:20:26Z
dc.date.completed	2007
dc.date.registered	20-11-2007
dc.description.abstract	newline
dc.format.accompanyingmaterial	DVD
dc.identifier.uri	http://hdl.handle.net/10603/191878
dc.language	English
dc.publisher.institution	Department of Electronics and Communication Engineering
dc.publisher.place	Kukatpally
dc.publisher.university	Jawaharlal Nehru Technological University, Hyderabad
dc.rights	university
dc.source.university	University
dc.title	Design of built in self test and repair scheme for static random access memory
dc.type.degree	Ph.D.