Enhancement of sbst techniques for detection of processor faults

dc.contributor.guide	Biswas, Santosh and Sahu, Aryabartta
dc.coverage.spatial	Computer Science and Engineering
dc.creator.researcher	Vasudevan, M S
dc.date.accessioned	2023-02-09T12:04:07Z
dc.date.available	2023-02-09T12:04:07Z
dc.date.awarded	2020
dc.date.completed	2020
dc.date.registered	2013
dc.description.abstract	At speed testing of processors is extremely difficult with any external testing technique therefore Softwarebased self testing SBST is introduced for efficient at speed testing of processors Evolutionary approaches are used for the automated synthesis of SBST codes However SBST development has been exceedingly difficult due to the sophisticated circuits of the modern processor hardware In addition the momentary nature of faults necessitates a careful and extensive test application This
dc.description.note	Not Available
dc.format.accompanyingmaterial	None
dc.format.dimensions	Not Available
dc.format.extent	Not Available
dc.identifier.uri	http://hdl.handle.net/10603/457725
dc.language	English
dc.publisher.institution	Department of Computer Science and Engineering
dc.publisher.place	Guwahati
dc.publisher.university	Indian Institute of Technology Guwahati
dc.relation	Not Available
dc.rights	self
dc.source.university	University
dc.subject.keyword	Computer Science
dc.subject.keyword	Computer Science Information Systems
dc.subject.keyword	Engineering and Technology
dc.title	Enhancement of sbst techniques for detection of processor faults
dc.title.alternative	Not available
dc.type.degree	Ph.D.