Mechanical Reliability of Metal Si Systems at different Length scales under Thermal Cyclic Loading

Abstract

Metal structures of nanometer to micrometer sizes in different configurations, such as thin films, thick coatings and 3D interconnects, are widely used for conducting electrical signals in several semiconductor-based devices, such as microelectronic chips, photovoltaics (PV), micro/nano-electromechanical systems (MEMS/NEMS), etc. In practice, the main challenge that confronts the structural reliability of these systems arises due to the wide difference in the coefficient of thermal expansion (CTE) of metal (Cu:17.5 × 10-6 K-1, Ag:19 × 10-6 K-1, Al: 23 × 10-6 K-1) and Si (2.7 × 10-6 K-1); This generates large thermal stresses during fabrication, post-fabrication annealing as well as thermal excursions during service. Thus, it is necessary to engineer the devices based on the understanding of the microscopic processes that lead to deformation and failure of these structures under cyclic thermal stresses to ensure their reliable functioning over the designed service life. In this regard, three metal-Si systems, namely Cu filled through Si vias (TSV), PV solar cell and thin metal film/particles on Si - all having different geometrical constraints as well as characteristic length-scales - were investigated in the course of this work. The first metal-Si system studied was 100 µm diameter Cu- filled TSV (Cu-TSV) which are used as the interconnects in the 3D microelectronic systems. In this segment of the study, the effect of TSV fabrication process and subsequent annealing (temperature range of 250 to 550 °C) and accelerated thermal cycling (temperature range of -50 to 150 °C) on its structural integrity was studied. During annealing and thermal cycling tests, grain boundary sliding induced non-uniform extrusion of Cu, Cu-Si reaction and nucleation of micro-cracks in Si were observed, whereas, during post-annealing aging at room temperature, slow growth of the micro-cracks in Si was observed...